There are increasing chances and demands for connecting the equipment such as a portable terminal, a printer, a camera, a copying machine, a display, a video apparatus, and a sound device, other than the personal computer, directly with a network. Though such equipment may or may not mount a CPU of comparatively low price and low processing performance. When the Internet standard protocol such as Transmission Control Protocol (TCP), User Datagram Protocol (UDP) or Internet Protocol (IP) is implemented, using such equipment resources, the following methods are considered.                Implement a TCP/UDP/IP protocol stack though the CPU of low processing performance at low bit rate (band).        Implement the network communication of relatively wide band by using an auxiliary device specialized to the protocol process such as a TCP/IP off-road engine (TOE).        
However, while the amount of information treated by the equipment is growing in any of the photo, dynamic image and music, it is necessary to suppress the cost of equipment to the low price. In this background, it is easy to imagine that the approach for achieving a network communication function by TOE will increase in the future.
In achieving the TCP/IP protocol stack by hardware (TOE achievement), there is an idea that the method of achievement only by software until now is implemented by hardware to make this protocol stack most simply. The TCP/UDP/IP protocol stack that is achieved by software is based on the method of enough withering, and this idea is one appropriate idea. However, when the method contrived for software (for CPU) is employed for hardware, it is doubtful that the software implementation method is the appropriate implementation method by hardware. The hardware is weak in a complex pointer process, dynamic generation or annihilation of variable, a recursive process, and a lot of process generation. Therefore, the TCP/IP protocol stack implemented by software has many procedures such as a complex pointer process, dynamic generation or annihilation of variable or memory area everywhere.
If the conventional procedure is implemented directly by hardware, the following flow is roughly pursued.
(1) Temporarily store one series of transmit data instructed to transmit from an application device in a consecutive shared memory area.
(2) The protocol control block at the highest level refers to, divides, and adds the header to one series of transmit data stored in the shared memory, and passes the control to the next protocol control block together with the access right of the shared memory. Each protocol control block sequentially refers to, divides, and adds the header to the shared memory.
(3) Arrange the header and the payload adjacently in a consecutive memory space. Herein, when all of the payload can not be arranged in the consecutive memory space, arrange only the payload in another memory space.
(4) The payload adjacent or not adjacent to the header, and the continuous frame relation, are stored as memory control information in the memory in the number as required (typically called mbuf).
That is, the header is generated after complex payload division and the generation of the management information (mbuf) for the payload or header, and this processing is executed sequentially for each protocol stack.
In the prior technical document 1, there was described a communication control device in which either general-purpose protocol processing means that is configured by a processor that communicates general-purpose data, or special-purpose protocol processing means for uniting the header information and the transmit data, is appropriately selected according to the transmit data (the prior technical document 1: Japanese Patent Laid-Open No. 2000-59463).
Moreover, in the prior technical document 2, there was described a semiconductor circuit device in which the packet is divided into partial data, and each of a plurality of processes for divided partial data is performed in parallel (the prior technical document 2: Japanese Patent Laid-Open No. 2004-48392).
Also, in the prior technical document 3, there was described a data transmission device for writing the protocol control information for the division data at the top or the end of the division data, and transmitting the protocol control information and the division data collectively as one packet (the prior technical document 3: Japanese Patent Laid-Open No. 11-215204).
Also, in the prior technical document 4, an apparatus for processing the TCP/IP by hardware and its operation method were described (the prior technical document 4: Japanese Patent Laid-Open No. 2001-268159).
However, the above method had the following problems.
(1) The parallel processing ability that hardware originally has can not be exhibited.
(2) The memory management method employs many pointer processings, and is not implemented easily by hardware.
Moreover, when the above-mentioned procedure is pursued, it is required to write all the headers for individual frames into the memory, when the TCP segmentalization or the IP fragmentation is needed due to the transfer unit of application. That is, there is a problem that if the transfer unit of application is greater for the MTU that depends on the link layer, the number of frames after division increases, and the memory area for writing the headers to the frames also increases.
In general, the header and the payload are built into the frame within the memory and outputted. However, it is required to write all the headers for individual frames into the memory, when the TCP segmentalization or the IP fragmentation is needed due to the transfer unit of application.